Exploring the Viability of a Single Board, Ultra-High Density Non-Volatile Mass Memory and
Data Formatting Solution for Critical Space Applications, 15-R8086

Printer Friendly Version

Principal Investigators
John R. Dickinson
Steven E. Torno
Charlie W. Howard
 

Inclusive Dates:  07/30/09 – 12/14/09

Background - Scientists depend on space observation to further our understanding of the origins of the universe, our solar system, and how our planet fits into the cosmos. The unique instrument payload of a satellite mission requires custom interface electronics. Spacecraft transponder interfaces, however, are standardized. The instrument data is usually stored until downlink bandwidth is available and then transmitted to the transponder for downlink. With recent work on several NASA missions, including the Mission Unique Board on Wide-Field Infrared Survey Explorer (WISE) and the Mass Memory Module (MMM) on Magnetospheric Multiscale Mission, SwRI is uniquely poised to provide a solution to connect unique science payloads directly to the transponder while providing onboard data storage capacity. The Instrument Storage Module (ISM) was designed to bridge the gap between payload and transponder by providing an application specific instrument interface, a high density non-volatile mass memory disc, and a standard transponder interface. With this single module, bus vendors can flexibly interface to an array of different payloads..

Approach - Initially, a preliminary schematic and layout design of the ISM was generated with the desired components and functionality. The ISM is equipped with custom interfaces to the instrument, CCSDS formatting algorithms implemented in a Field Programmable Gate Array (FPGA), a flash-based mass memory storage disc, and a direct X-Band or Ku-Band transponder output interface. The major challenges to this project include achieving a bandwidth goal between the board and the communication system of 120 Mbps, providing sufficient simultaneous bandwidth into and out of the data disc, and packaging all necessary components onto a standard 6U printed circuit board (PCB) form factor. In order to address these challenges, various analyses were performed on the preliminary design, including FPGA simulation, FPGA timing design, and board layout timing analysis.

Accomplishments - Through efficient board design and the use of Column Grid Array (CGA) parts where possible, all components were accommodated within the desired 6U form factor. Based on the timing analyses, it was determined that the input data rate was primarily limited by the bandwidth of write accesses to the Flash Memory. The bottleneck of the data rate to the transponder was the FPGA deserializer frequency. Identifying the critical timing paths allowed the board to be implemented in such a way as to maximize board bandwidth and minimize trace latency. The results prove the ISM is capable of interfacing to an instrument with up to 104 Mbps of continuous data output and is capable of sourcing data to a transponder at a frequency up to 168 Mbps.

2010 Program Home