Analysis and Implementation of Software-Defined Waveforms on a Reprogrammable Platform, 09-R9615

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Principal Investigators
Norm Carmichael
Chris Sauer
Jennifer Alvarez

Inclusive Dates:  06/01/06 – 09/30/06

Background - The Joint Tactical Radio System (JTRS) is an extensive United States Department of Defense (DoD) effort designed to meet the current diverse warfighter communications needs and is intended to realize the DoD's vision of transforming today's platform-centric force into a network-centric one. JTRS is being applied across the full range of military communications from airborne to man-portable radios.

The Software Communications Architecture (SCA) is an open architecture defined by the JTRS Joint Program Office (JPO). The SCA has been published to provide a common open architecture that can be used to build a collection of interoperable radios across multiple domains. In theory, the radios built upon SCA are interoperable, support software reusability, and enable new technology insertion. One of the primary goals of this research effort is to establish a core competency in the field of SCA-compliant waveform application development, so that SwRI may offer the government and other potential clients an effective, novel solution that supports ongoing efforts toward the establishment of an integrated communications network.

Approach - The approach is to demonstrate that a shared resource model can be used to readily host a waveform that maximizes digital implementation of the baseband signal processing. A major initiative of this effort is the development of a waveform application that is reconfigurable and that executes within the Core Framework as specified by the SCA architecture. Specifically, the approach is to host and demonstrate transmission of the SILO waveform on the IDP100 hardware platform.

Accomplishments -

  • Identification of fundamental components established by the JTRS Software Communications Architecture
  • Description of the Operating Environment (and its associated SCA components) deployed on the IDP100 platform
  • System Generator model of the SILO modulator was completed and simulated using Simulink/Matlab.
  • Peripheral firmware components (data/signal processing stages required for transmission of the SILO waveform on the IDP100) were authored in VHDL
  • Support software was developed to generate a SILO message

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