Data Management Architectures for Gigabit per Second, Terabit Capacity Non-Volatile Data Storage, 15-R8468
Michael A. Koets
Larry T. McDaniel
Inclusive Dates: 04/16/14 – 08/16/14
Background — There is increasing demand for radiation-tolerant, high-performance data storage systems for spacecraft applications such as synthetic aperture radar (SAR) and image collection missions. These high-performance data storage units (DSUs) require storage capacities of gigabits or terabits and access rates of hundreds of megabits or gigabits per second. Flash memory provides a good solution for providing these capabilities by providing high storage density, non-volatile storage, and low power consumption. However, use of this memory technology is subject to a number of challenges including a command-based interface that limits the flexibility of how the memories can be accessed, highly asymmetric read, write, and erase times, and inevitable localized failures of portions of the devices.
Approach — This project sought to develop a capability for the design of high performance DSUs through two primary investigations. The first investigation developed a framework, methodology, and supporting software tools that accelerate the design of the low-level hardware architecture and interface logic of a DSU. These tools allow an engineer to quickly experiment with memory architectures and design the sequences of control commands that are issued to flash memory devices to achieve high storage capacity and very fast access rates. These tools include the ability to visualize important aspects of the interface sequence, validate that no constraints on the memory functions are violated, and accurately predict the performance of the design. The second investigation explored mechanisms for providing high- level organization of the data stored in a DSU. The high rates of data access and the physical characteristics of flash memory preclude a traditional file-based data organization approach. We developed data structures and a software implementation of a data organization mechanism that is compatible with the low-level flash memory interface while providing a flexible, simple interface to the spacecraft applications that use the DSU.
Accomplishments — The framework and supporting tools for the design of low-level flash memory interface architectures were employed to find solutions to a variety of realistic DSU design problems. One example used the tools to define a DSU providing 128 GB of data storage and simultaneous storage and retrieval of data at more than 256 MB per second each way. The data organization software has been incorporated into a software emulator that allows early, software-based simulation of a DSU within the context of spacecraft mission operations. The emulator incorporates the actual code used in flight, providing high-fidelity simulation of DSU operations. When integrated with a low-level data storage simulator and mission simulation software, the overall performance of the DSU can be evaluated and tailored to meet mission objectives. Figure 1 illustrates the emulator software.